Intel’s Fortune Rests on the Success of 18A Process Technology
High-tech giant Intel announced plans to develop 14A and 10A processes in 2026 and 2027, respectively, earlier this year. However, current CEO Patrick Gelsinger has largely staked the company’s future on the successful implementation of the Intel 18A process, a milestone he noted upon taking office three years ago.
In 2021, Intel set out to master five new processes within four years and catch up technologically with competitors by 2025. This timeline coincides with the company’s plan to facilitate mass production under the 18A technology by then. However, examples of these chips will roll off the production line in the second half of this year.
In the longer term, plants in Arizona and Ohio are slated to take over 18A-based production for Intel and its clients. However, since these facilities are yet to be built, Intel has to rely on an Oregon-based factory located adjacent to a research center where the 18A process is being rolled out, at least for the foreseeable future.
“I’ve Bet the Whole Company on 18A Process”
In an interview with TechTechPotato, Intel’s CEO admitted, “I’ve bet the whole company on the 18A process.” His stance appears to have evolved since last November when he expressed doubts on PCGamer about whether his company’s entire fate did hinge on the 18A process.
The success of Intel’s contract business now equally depends on the success of the 18A process. Notably, it has already attracted at least four major clients – defense manufacturers Boeing and Northrop Grumman, Swedish firm Ericsson, and Microsoft Corporation. Furthermore, the company is tailoring development tools and the 18A process itself to meet the needs of Arm’s clients, which should help grow this customer segment. By 2030, Intel aims to become the world’s second-largest contract chip manufacturer, a goal highly reliant on the successful development of the 18A process.
The 18A Process and Power Delivery
Key to Intel’s technical changes is the 18A process’s provision for power delivery to the chips from the backside of the crystal. Currently, the top layers of a chip, which are made of metal, handle power supply. However, a multitude of tiny windows must be carved into these layers for signal transmission to lower layers, causing interference and lowering the efficiency of the electrical part. Powering the lower layers from the backside of the crystal will resolve these issues.
