Intel discontinues Xeon Phi, removes Knights Mill and Knights Landing support from LLVM.

Intel has removed support for the Xeon Phi Knights Mill and Knights Landing accelerators from the latest version of the LLVM/Clang 19 compiler, effectively ending the MIC (Many Integrated Core) architecture originally developed for the exascale-class Aurora supercomputer.

A Series of Delays and Performance Issues

The Knights Mill processors were set to significantly boost Aurora’s performance, but the project encountered numerous delays and failed to meet anticipated metrics. This eventually led to the cancellation of the initial version of Aurora. The US Department of Energy later modified the Aurora architecture to include Intel Sapphire Rapids processors and Intel Ponte Vecchio graphics processors. However, this revision also met with performance issues and implementation delays, as reported by Tom’s Hardware and Phoronix.

Current Status of Aurora Supercomputer

Currently, the exascale Aurora supercomputer is gearing up for its launch this year, but difficulties with both software and hardware, including its cooling system, are hindering it from reaching its full potential.

Trend in Major Compilers

Intel’s decision to end Xeon Phi support in LLVM/Clang aligns with a trend among major compilers. Support was previously marked as superannuated in LLVM/Clang 18, and in GCC, it was declared obsolete in version 14 and entirely moved in version 15.

Intel’s Future Focus

Intel stated that removing support will “reduce the maintenance efforts of the compiler and simplifies its future development.” The company plans to focus on specialized solutions for artificial intelligence and high-performance computing, marking the end of the road for Xeon Phi products inspired by Larrabee. Intel officially ceased their manufacturing in 2019.

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